Hi!
> Add support for the built-in RTC on Microchip PolarFire SoC
> +#define CONTROL_UPLOAD_BIT BIT(5)
> +#define CONTROL_DOWNLOAD_BIT BIT(6)
> +#define CONTROL_DOWNLOAD_BIT BIT(6)
> +#define CONTROL_WAKEUP_CLR_BIT BIT(8)
Dup?
> +static void mpfs_rtc_start(struct mpfs_rtc_dev *rtcdev)
> +{
> + u32 ctrl;
> +
> + ctrl = readl(rtcdev->base + CONTROL_REG);
> + ctrl &= ~(CONTROL_STOP_BIT | CONTROL_START_BIT);
> + ctrl |= CONTROL_START_BIT;
> + writel(ctrl, rtcdev->base + CONTROL_REG);
> +}
You don't need to clear bit just to set it.
> + do {
> + prog = readl(rtcdev->base + CONTROL_REG);
> + prog &= CONTROL_UPLOAD_BIT;
> + } while (prog);
Limit to XY iterations?
> +
> +static int mpfs_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> + u32 mode = readl(rtcdev->base + MODE_REG);
> + u64 time;
> +
> + mode = readl(rtcdev->base + MODE_REG);
Dup?
> + if (mode & MODE_WAKE_EN) + alrm->enabled = true; + else + alrm->enabled = false; +
enabled = ()?
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
