This adds the documentation for the devicetree bindings of the Texas Instruments RTC modules on K3 family of SoCs such as AM62x SoCs or newer. Signed-off-by: Nishanth Menon <nm@xxxxxx> --- .../devicetree/bindings/rtc/ti,k3-rtc.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml diff --git a/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml b/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml new file mode 100644 index 000000000000..16aebb8013a1 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/ti,k3-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 Real Time Clock + +maintainers: + - Nishanth Menon <nm@xxxxxx> + +description: | + This RTC appears in the AM62x family of SoCs. + +properties: + compatible: + items: + - enum: + - ti,am62-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: VBUS Interface clock + - description: 32k Clock source (external or internal). + + clock-names: + items: + - const: "vbus" + - const: "osc32k" + + power-domains: + maxItems: 1 + + assigned-clocks: + description: | + override default osc32k parent clock reference to the osc32k clock entry + maxItems: 1 + + assigned-clock-parents: + description: | + override default osc32k parent clock phandle of the new parent clock of osc32k + maxItems: 1 + + wakeup-source: true + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + rtc@2b1f0000 { + compatible = "ti,am62-rtc"; + reg = <0x2b1f0000 0x100>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&bar 0>; + clocks = <&foo 0>, <&foo 1>; + clock-names = "vbus", "osc32k"; + wakeup-source; + }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + rtc@2b1f0000 { + compatible = "ti,am62-rtc"; + reg = <0x2b1f0000 0x100>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&bar 0>; + clocks = <&foo 0>, <&foo 1>; + clock-names = "vbus", "osc32k"; + wakeup-source; + assigned-clocks = <&foo 1>; + assigned-clock-parents = <&foo 2>; + + }; -- 2.31.1
