Re: [PATCH v14 3/5] rtc: goldfish: use gf_ioread32()/gf_iowrite32()

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On 30/01/2022 15:33:31+0100, Laurent Vivier wrote:
> replace readl()/writel() by gf_ioread32()/gf_iowrite32()
> as done for goldfish-tty.
> 
> Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
Acked-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx>

> ---
>  drivers/rtc/rtc-goldfish.c | 31 ++++++++++++++++---------------
>  1 file changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/rtc/rtc-goldfish.c b/drivers/rtc/rtc-goldfish.c
> index 7ab95d052644..eb1929b0cbb6 100644
> --- a/drivers/rtc/rtc-goldfish.c
> +++ b/drivers/rtc/rtc-goldfish.c
> @@ -10,6 +10,7 @@
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
>  #include <linux/rtc.h>
> +#include <linux/goldfish.h>
>  
>  #define TIMER_TIME_LOW		0x00	/* get low bits of current time  */
>  					/*   and update TIMER_TIME_HIGH  */
> @@ -41,8 +42,8 @@ static int goldfish_rtc_read_alarm(struct device *dev,
>  	rtcdrv = dev_get_drvdata(dev);
>  	base = rtcdrv->base;
>  
> -	rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
> -	rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
> +	rtc_alarm_low = gf_ioread32(base + TIMER_ALARM_LOW);
> +	rtc_alarm_high = gf_ioread32(base + TIMER_ALARM_HIGH);
>  	rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;
>  
>  	do_div(rtc_alarm, NSEC_PER_SEC);
> @@ -50,7 +51,7 @@ static int goldfish_rtc_read_alarm(struct device *dev,
>  
>  	rtc_time64_to_tm(rtc_alarm, &alrm->time);
>  
> -	if (readl(base + TIMER_ALARM_STATUS))
> +	if (gf_ioread32(base + TIMER_ALARM_STATUS))
>  		alrm->enabled = 1;
>  	else
>  		alrm->enabled = 0;
> @@ -71,18 +72,18 @@ static int goldfish_rtc_set_alarm(struct device *dev,
>  
>  	if (alrm->enabled) {
>  		rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
> -		writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
> -		writel(rtc_alarm64, base + TIMER_ALARM_LOW);
> -		writel(1, base + TIMER_IRQ_ENABLED);
> +		gf_iowrite32((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
> +		gf_iowrite32(rtc_alarm64, base + TIMER_ALARM_LOW);
> +		gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
>  	} else {
>  		/*
>  		 * if this function was called with enabled=0
>  		 * then it could mean that the application is
>  		 * trying to cancel an ongoing alarm
>  		 */
> -		rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
> +		rtc_status_reg = gf_ioread32(base + TIMER_ALARM_STATUS);
>  		if (rtc_status_reg)
> -			writel(1, base + TIMER_CLEAR_ALARM);
> +			gf_iowrite32(1, base + TIMER_CLEAR_ALARM);
>  	}
>  
>  	return 0;
> @@ -98,9 +99,9 @@ static int goldfish_rtc_alarm_irq_enable(struct device *dev,
>  	base = rtcdrv->base;
>  
>  	if (enabled)
> -		writel(1, base + TIMER_IRQ_ENABLED);
> +		gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
>  	else
> -		writel(0, base + TIMER_IRQ_ENABLED);
> +		gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
>  
>  	return 0;
>  }
> @@ -110,7 +111,7 @@ static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
>  	struct goldfish_rtc *rtcdrv = dev_id;
>  	void __iomem *base = rtcdrv->base;
>  
> -	writel(1, base + TIMER_CLEAR_INTERRUPT);
> +	gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
>  
>  	rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);
>  
> @@ -128,8 +129,8 @@ static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
>  	rtcdrv = dev_get_drvdata(dev);
>  	base = rtcdrv->base;
>  
> -	time_low = readl(base + TIMER_TIME_LOW);
> -	time_high = readl(base + TIMER_TIME_HIGH);
> +	time_low = gf_ioread32(base + TIMER_TIME_LOW);
> +	time_high = gf_ioread32(base + TIMER_TIME_HIGH);
>  	time = (time_high << 32) | time_low;
>  
>  	do_div(time, NSEC_PER_SEC);
> @@ -149,8 +150,8 @@ static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
>  	base = rtcdrv->base;
>  
>  	now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
> -	writel((now64 >> 32), base + TIMER_TIME_HIGH);
> -	writel(now64, base + TIMER_TIME_LOW);
> +	gf_iowrite32((now64 >> 32), base + TIMER_TIME_HIGH);
> +	gf_iowrite32(now64, base + TIMER_TIME_LOW);
>  
>  	return 0;
>  }
> -- 
> 2.34.1
> 

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com



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