rtc-pcf8563: STOP bit usage during time update?

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Hello

According to the example on page 30 of the EPSON datasheet
https://support.epson.biz/td/api/doc_check.php?dl=app_RTC-8564JE&lang=en
for the 8564 version of this chip, the time update sequence is as follows:

- set CTRLSTS1[STOP] bit to 1
- update time registers
- set CTRLSTS1[STOP] bit to 0

The NXP datasheet is not so explicit regarding STOP bit handling.

Nevertheless I don't see any STOP bit related action in the driver:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/rtc/rtc-pcf8563.c?h=v5.14#n244

Am I overlooking or missing something here?



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