This RTC is a 32bit counter running at 16Hz. This overflows every eight years and a half. However, the driver uses the SW_VALUE register to store the overflow, extending the counter to 64bit as long as the update happens before the overflow. Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx> --- drivers/rtc/rtc-sirfsoc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/rtc/rtc-sirfsoc.c b/drivers/rtc/rtc-sirfsoc.c index b2e72597eee8..8b3c88fb9793 100644 --- a/drivers/rtc/rtc-sirfsoc.c +++ b/drivers/rtc/rtc-sirfsoc.c @@ -346,6 +346,7 @@ static int sirfsoc_rtc_probe(struct platform_device *pdev) return PTR_ERR(rtcdrv->rtc); rtcdrv->rtc->ops = &sirfsoc_rtc_ops; + rtcdrv->rtc->range_max = (1ULL << 60) - 1; rtcdrv->irq = platform_get_irq(pdev, 0); err = devm_request_irq(&pdev->dev, rtcdrv->irq, sirfsoc_rtc_irq_handler, -- 2.24.1
