On 22/08/2019 15:19:34+0200, Bruno Thomsen wrote: > The previous fix listed bulk read of registers as root cause of > accendential disabling of watchdog, since the watchdog counter > register (WD_VAL) was zeroed. > > Fixes: 3769a375ab83 rtc: pcf2127: bulk read only date and time registers. > > Tested with the same PCF2127 chip as Sean reveled root cause > of WD_VAL register value zeroing was caused by reading CTRL2 > register which is one of the watchdog feature control registers. > > So the solution is to not read the first two control registers > (CTRL1 and CTRL2) in pcf2127_rtc_read_time as they are not > needed anyway. Size of local buf variable is kept to allow > easy usage of register defines to improve readability of code. > > Debug trace line was updated after CTRL1 and CTRL2 are no longer > read from the chip. Also replaced magic numbers in buf access > with register defines. > > Signed-off-by: Bruno Thomsen <bruno.thomsen@xxxxxxxxx> > --- > v3: no change. > v2: new bugfix, not in v1. > > drivers/rtc/rtc-pcf2127.c | 32 ++++++++++++-------------------- > 1 file changed, 12 insertions(+), 20 deletions(-) > Applied, thanks. -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
