Re: [PATCH v3 2/4] rteval: cyclictest.py Parse max latencies from cyclictest output

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




On Mon, 18 Oct 2021, Punit Agrawal wrote:

> From: Punit Agrawal <punit1.agrawal@xxxxxxxxxxxxx>
> 
> When collecting a histogram of latencies, "cyclictest" reports the
> maximum latency encountered on each core even if they fall outside the
> configured no. of buckets. This can be useful to understand the worst
> case latencies for the run as well as right sizing the number of
> buckets for the histogram.
> 
> While processing the output of cyclictest, rteval skips the reported
> max latencies and calculates them by capping to the no. of buckets.
> 
> Fix rteval by parsing the maximum latencies reported by cyclictest.
> 
> Signed-off-by: Punit Agrawal <punit1.agrawal@xxxxxxxxxxxxx>
> ---
>  rteval/modules/measurement/cyclictest.py | 31 +++++++++++++++++++-----
>  1 file changed, 25 insertions(+), 6 deletions(-)
> 
> diff --git a/rteval/modules/measurement/cyclictest.py b/rteval/modules/measurement/cyclictest.py
> index ee1de883d844..d3a0b045b9dd 100644
> --- a/rteval/modules/measurement/cyclictest.py
> +++ b/rteval/modules/measurement/cyclictest.py
> @@ -67,20 +67,25 @@ class RunData:
>          retval += "mean:       %f\n" % self.__mean
>          return retval
>  
> -    def sample(self, value):
> -        self.__samples[value] += self.__samples.setdefault(value, 0) + 1
> +    def update_max(self, value):
>          if value > self.__max:
>              self.__max = value
> +
> +    def update_min(self, value):
>          if value < self.__min:
>              self.__min = value
> +
> +    def sample(self, value):
> +        self.__samples[value] += self.__samples.setdefault(value, 0) + 1
> +        self.update_max(value)
> +        self.update_min(value)
>          self.__numsamples += 1
>  
>      def bucket(self, index, value):
>          self.__samples[index] = self.__samples.setdefault(index, 0) + value
> -        if value and index > self.__max:
> -            self.__max = index
> -        if value and index < self.__min:
> -            self.__min = index
> +        if value:
> +            self.update_max(index)
> +            self.update_min(index)
>          self.__numsamples += value
>  
>      def reduce(self):
> @@ -332,6 +337,18 @@ class Cyclictest(rtevalModulePrototype):
>          return False
>  
>  
> +    def _parse_max_latencies(self, line):
> +        if not line.startswith('# Max Latencies: '):
> +            return
> +
> +        line = line.split(':')[1]
> +        vals = [int(x) for x in line.split()]
> +
> +        for i, core in enumerate(self.__cpus):
> +            self.__cyclicdata[core].update_max(vals[i])
> +            self.__cyclicdata['system'].update_max(vals[i])
> +
> +
>      def _WorkloadCleanup(self):
>          if not self.__started:
>              return
> @@ -348,6 +365,8 @@ class Cyclictest(rtevalModulePrototype):
>                  # Catch if cyclictest stopped due to a breaktrace
>                  if line.startswith('# Break value: '):
>                      self.__breaktraceval = int(line.split(':')[1])
> +                elif line.startswith('# Max Latencies: '):
> +                    self._parse_max_latencies(line)
>                  continue
>  
>              # Skipping blank lines
> -- 
> 2.33.0
> 
> 
Signed-off-by: John Kacur <jkacur@xxxxxxxxxx>

Thanks!




[Index of Archives]     [RT Stable]     [Kernel Newbies]     [IDE]     [Security]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Linux ATA RAID]     [Samba]     [Video 4 Linux]     [Device Mapper]

  Powered by Linux