On Wed, Sep 22, 2021 at 03:02:32PM +0200, Sebastian Andrzej Siewior wrote: > On 2021-09-22 13:38:20 [+0200], Frederic Weisbecker wrote: > > > So you rely on some implicit behaviour which breaks with RT such as: > > > > > > CPU 0 > > > ----------------------------------------------- > > > RANDOM TASK-A RANDOM TASK-B > > > ------ ----------- > > > int *X = &per_cpu(CPUX, 0) int *X = &per_cpu(CPUX, 0) > > > int A, B; > > > spin_lock(&D); > > > spin_lock(&C); > > > WRITE_ONCE(*X, 0); > > > A = READ_ONCE(*X); > > > WRITE_ONCE(*X, 1); > > > B = READ_ONCE(*X); > > > > > > while spinlock C and D are just random locks not related to CPUX but it > > > just happens that they are held at that time. So for !RT you guarantee > > > that A == B while it is not the case on RT. > > > > Not sure which spinlocks you are referring to here. Also most RCU spinlocks > > are raw. > > I was bringing an example where you also could rely on implicit locking > provided by spin_lock() which breaks on RT. Good point!
