In arm64 it's possible for the processor to access memory appearing in
program order after the read of the counter before the counter has been
read. This would skew the counter value to a later point than intended.
Fix this my adding an isb() following the counter read instruction.
Suggested-by: Punit Agrawal <punitagrawal@xxxxxxxxx>
Signed-off-by: Nicolas Saenz Julienne <nsaenzju@xxxxxxxxxx>
---
src/oslat/oslat.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/oslat/oslat.c b/src/oslat/oslat.c
index 5fce223..50ddc81 100644
--- a/src/oslat/oslat.c
+++ b/src/oslat/oslat.c
@@ -92,6 +92,13 @@ static inline void frc(uint64_t *pval)
*/
__asm__ __volatile__("isb" : : : "memory");
__asm__ __volatile__("mrs %0, cntvct_el0" : "=r" (*pval) :: "memory");
+ /*
+ * This isb() is required to prevent the processor from accessing
+ * memory appearing in program order after the read of the counter
+ * before the counter has been read. Which would skew the counter value
+ * to a later point than intended.
+ */
+ __asm__ __volatile__("isb" : : : "memory");
}
# else
--
2.31.1
