Re: [PATCH] arm: Disable hard IRQs in harden_branch_predictor

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On Fri, 8 Feb 2019 18:25:26 +0000
Bernd Edlinger <bernd.edlinger@xxxxxxxxxx> wrote:

> The harden_branch_predictor function uses smp_processor_id,
> which complains about being used in a preemptible context:
> 
> BUG: using smp_processor_id() in preemptible [00000000] code: trie_map_rand.e/4938
> caller is debug_smp_processor_id+0x18/0x24
> CPU: 0 PID: 4938 Comm: trie_map_rand.e Not tainted 4.14.93-rt53-g74e4d87 #1
> Hardware name: Altera SOCFPGA
> [<8011162c>] (unwind_backtrace) from [<8010bfd4>] (show_stack+0x20/0x24)
> [<8010bfd4>] (show_stack) from [<806732e8>] (dump_stack+0x78/0x94)
> [<806732e8>] (dump_stack) from [<8041c254>] (check_preemption_disabled+0xec/0x128)
> [<8041c254>] (check_preemption_disabled) from [<8041c2a8>] (debug_smp_processor_id+0x18/0x24)
> [<8041c2a8>] (debug_smp_processor_id) from [<8011518c>] (__do_user_fault+0x34/0x100)
> [<8011518c>] (__do_user_fault) from [<801155d0>] (do_page_fault+0x2f4/0x328)
> [<801155d0>] (do_page_fault) from [<80101268>] (do_DataAbort+0x48/0xc8)
> [<80101268>] (do_DataAbort) from [<8010d300>] (__dabt_usr+0x40/0x60)
> Exception stack(0xae2fdfb0 to 0xae2fdff8)
> dfa0:                                     c31b0fc6 76c8f7d8 00000000 00000001
> dfc0: 00000001 00c79780 0004f7f4 00c79780 7ea2e550 7ea2e408 7ea2e58c 3fc99999
> dfe0: 00000100 7ea2e3d0 00033d24 00018edc 600c0010 ffffffff
> 
> Work around the issue by disabling hard IRQs while clearing
> the branch predictor table.
> 
> Signed-off-by: Bernd Edlinger <bernd.edlinger@xxxxxxxxxx>
> ---
> I am not really sure if this is could in theory happen also without the RT patch,
> but I have so far not observed it with V4.18.  Happens probably only under significant
> memory pressure.
> 
> Please advise if this is the correct way to fix this problem.
> 
> Thanks
> Bernd.
> ---
>  arch/arm/include/asm/system_misc.h | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h
> index 8e76db8..781d61f 100644
> --- a/arch/arm/include/asm/system_misc.h
> +++ b/arch/arm/include/asm/system_misc.h
> @@ -21,10 +21,14 @@ typedef void (*harden_branch_predictor_fn_t)(void);
>  DECLARE_PER_CPU(harden_branch_predictor_fn_t, harden_branch_predictor_fn);
>  static inline void harden_branch_predictor(void)
>  {
> -	harden_branch_predictor_fn_t fn = per_cpu(harden_branch_predictor_fn,
> -						  smp_processor_id());
> +	harden_branch_predictor_fn_t fn;
> +	unsigned long flags;
> +
> +	local_irq_save(flags);

local_irq_save() is a bit heavy wait. A preempt_disable() would be
faster, and in case the fn() can call a spinlock, perhaps just a
migrate_disable(). But I'm not sure how we decided about open coded
migrate_disable()s yet.

-- Steve


> +	fn = per_cpu(harden_branch_predictor_fn, smp_processor_id());
>  	if (fn)
>  		fn();
> +	local_irq_restore(flags);
>  }
>  #else
>  #define harden_branch_predictor() do { } while (0)




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