On 06/30/2016 12:01 PM, Borislav Petkov wrote:
On Thu, Jun 30, 2016 at 11:40:17AM -0500, Corey Minyard wrote:
I'm not sure. I've included the entire boot log below...
...
[ 0.164185] [<ffffffff8106dcd8>] try_to_wake_up+0x28/0x320
[ 0.164188] [<ffffffff8106dfe0>] wake_up_process+0x10/0x20
[ 0.164207] [<ffffffff8101c548>] mce_notify_irq+0x28/0x30
[ 0.164210] [<ffffffff8101df35>] intel_threshold_interrupt+0xb5/0xd0
[ 0.164213] [<ffffffff8101e88c>] smp_threshold_interrupt+0x1c/0x40
[ 0.164221] [<ffffffff816f9b5a>] threshold_interrupt+0x6a/0x70
[ 0.164223] <EOI>
[ 0.164226] [<ffffffff8101dda7>] ? cmci_recheck+0x67/0x70
[ 0.164241] [<ffffffff816e9777>] setup_local_APIC+0x276/0x283
[ 0.164259] [<ffffffff81caf010>] native_smp_prepare_cpus+0x379/0x43b
[ 0.164266] [<ffffffff81ca3e4f>] kernel_init_freeable+0xd7/0x21a
[ 0.164270] [<ffffffff816df1f0>] ? rest_init+0x90/0x90
[ 0.164272] [<ffffffff816df1f9>] kernel_init+0x9/0x180
[ 0.164275] [<ffffffff816f8dc8>] ret_from_fork+0x58/0x90
[ 0.164277] [<ffffffff816df1f0>] ? rest_init+0x90/0x90
[ 0.164295] Code: e7 ff ff 48 8b 7d 08 e8 02 1a 95 ff 5d c3 55 48 89 e5
41 54 53 48 89 fb 9c 41 5c fa bf 01 00 00 00 e8 a8 38 00 00 ba 00 01 00 00
<f0> 66 0f c1 13 0f b6 ce 38 d1 74 10 0f 1f 80 00 00 00 00 f3 90
[ 0.164298] RIP [<ffffffff816f344d>] _raw_spin_lock_irqsave+0x1d/0x50
[ 0.164298] RSP <ffff88017fa03f00>
[ 0.164299] CR2: 0000000000000600
[ 0.656225] ---[ end trace 0000000000000001 ]---
[ 0.656233] Kernel panic - not syncing: Fatal exception in interrupt
Hmm, we have that setup_local_APIC -> cmci_recheck path on latest kernel
too. However, we do init CMCI earlier, down the start_kernel() path.
Would it be possible to boot latest upstream kernel on it to see whether
it explodes the same way?
Thanks.
This is on 3.10-rt with PREEMPT_RT enabled. It appears that from 3.18-rt
and later it has code like the change I have proposed, so it does not crash.
I could add a something to see if the interrupt is coming in early to
4.6-rt,
is that what you are looking for?
-corey
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