On Dec 10, 2012, at 3:00 AM, Stanislav Meduna <stano@xxxxxxxxxx> wrote: > Hi, > > I have a machine that puts several interrupts on one interrupt > line. As these are generally headless embedded machines bought > and installed by the customer, it is a bit problematic to tweak > the BIOS to assign them in an optimal way. > > Now I am seeing latencies such as > > Wakeup shared prio > 385 50 638 (0) irq/15-eth1 <- 28 50 irq/15-ata_piix 5147.373113 > #Minimum latency: 1 microseconds > #Average latency: 4 microseconds > #Maximum latency: 638 microseconds > > I don't care about the ATA, but eth1 is important. Is it > enough to adjust the priorities of the kernel threads > or are shared interrupts generally a recipe for problems > in the RT_FULL world? > I think that the worst-case would occur when the eth1 irq is asserted right after the system has vectored to the ATA handler. I am not sure about the current state of things, but in the past, a shared IRQ line would not process another iRQ until the first one completes. To work around it, the ATA code must be modified to turn off the IRQ assert at the chip (this may have already been done) Sven -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
