Re: Disabling lapic timer for a certain core

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On Thu, Mar 04, 2010 at 01:29:53PM +0100, M. Koehrer wrote:
| Hi all!
| 
| I am running the RT_PREEMPT kernel 2.6.31.2-rt13 on a Intel Quad Core CPU.
| I start my kernel with isolcpus=1-7 option to force all processes to run on CPU core 0 only.
| Now we have the need for a very fast loop. Within this loop some accesses from/to a PCIe I/O board
| (mapped in user space) and some additional computation has to be done.
| For this, I use a real time thread, run this on CPU core 3 and let it run in an endless polling loop.
| So far everything works fine.
| This thread is the only running user mode thread on CPU core 3.
| However, we measure some run time jitters when accessing the I/O board in the range of up to 
| 15 microseconds which are not tolerable by the application.
| I see that on all cores the "Local Timer Interrupt" occurs 100 times a
| second (of course this is the timer frequency select in the kernel configuration).

Are CPU0 and CPU3 on the same socket? Are you using a SMP or a NUMA box? I
would suggest running your application in a CPU on a different socket just
to ensure you are not having any cache issues.

Have you tried running hwlat_detect or smi-test? Your 15us threshold is pretty
tight and could easilly be affected by SMI spikes (if present in your
system).

Luis

| My question is now:
| Is it possible to disable the "Local Timer Interrupt" for core 3 as it is actually not required here?
| I want to use the full 100% CPU core time for this single loop.
| 
| Any help or ideas are welcome!
| 
| Thanks a lot.
| 
| Regards
| 
| Mathias
| 
| -- 
| Mathias Koehrer
| mathias_koehrer@xxxxxxxx
| 
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-- 
[ Luis Claudio R. Goncalves                    Bass - Gospel - RT ]
[ Fingerprint: 4FDD B8C4 3C59 34BD 8BE9  2696 7203 D980 A448 C8F8 ]

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