Dear all;
I'm trying to port the RT-Preempt patch on the NIOS II processor. NIOS
II is a softcore processor (with or without MMU) that runs into an
Altera FPGA circuit. It is designed by Altera and is used to build SoPC
(System on Programmable Chip).
Until now, I've integrated the RT-Preempt patch
(patch-2.6.31.12-rt20.gz) into the 2.6.31 Linux source code
(http://sopc.et.ntust.edu.tw/) for nios2mmu (NIOS II with MMU). I have
now to modify files under the arch/nios2 directory according to these
guidelines:
- Katsuya Matsubara. Porting and Evaluating the Linux Realtime
Preemption on Embedded Platform:
http://www.celinuxforum.org/CelfPubWiki/JapanTechnicalJamboree14?action=AttachFile&do=get&target=preempt070427celfjambo14.pdf
- Wu Zhangjin, Nicholas Mc Guire. Porting RT-preempt to Loongson2F:
http://lwn.net/images/conf/rtlws11/papers/proc/p14.pdf
- Port PREEMPT_RT on AR71xx on mailing list:
http://marc.info/?l=linux-rt-users&m=126441381626221&w=2
In the same time, I study the hrtimer subsystem.
In my SoPC design, I have added an specific HW timer (named hrtimer)
that have a 20 ns resolution. I intend to integrate it in the NIOS II
port as a hrtimer.
I've found some useful documents on hrtimer subsytem:
- Thomas Gleixner, Douglas Niehaus. hrtimers and beyond:
http://www.kernel.org/pub/linux/kernel/people/tglx//hrtimers/ols2006-hrtimers.pdf
- RT Wiki page: http://rt.wiki.kernel.org/index.php/High_resolution_timers
- RT Wiki page:
http://rt.wiki.kernel.org/index.php/High_resolution_timer_design_notes
Are there guidelines explaining how to integrate a specific HW timer in
the hrtimer subsystem?
Are there some source code and examples that can help me to integrate
my specific timer as hrtimer?
Thank you for your help.
Patrice.
--
Patrice Kadionik. F6KQH / F4CUQ
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