On Mon, Oct 01, 2007 at 03:09:16PM -0700, Davide Libenzi wrote: > On Mon, 1 Oct 2007, Paul E. McKenney wrote: > > > That would indeed be one approach that CPU designers could take to > > avoid being careless or sadistic. ;-) > > That'd be the easier (unique maybe) approach too for them, from an silicon > complexity POV. Distinguishing between different CPUs stores once inside a > shared store buffer, would require tagging them in some way. That'd defeat > most of the pros of having a shared store buffer ;) Tagging requires but one bit per entry. Depends on the workload -- if lots of barriers, bursty stores and little sharing, tagging might win. If lots of sharing, then your suggested approach might win. Thanx, Paul - To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
