On 2020-04-23 4:09 pm, Peter Geis wrote:
On Thu, Apr 23, 2020 at 11:05 AM Peter Geis <pgwipeout@xxxxxxxxx> wrote:
The rk3399 is capable of operating at PCIe gen 2 as per the TRM.
The device-tree incorrectly limits us to gen 1.
Correctly set the maximum link speed to <2>.
Tested on the rockpro64.
Note, this was tested on the rockpro64 after I performed the hardware
fixes as delineated at
https://forum.pine64.org/showthread.php?tid=8374
We probably will have to drop this back to <1> on board specific dts
files if issues are discovered.
I'd say commit 712fa1777207 and the fact that the current rev 1.8
datasheet only mentions 2.5GT/s rather weaken that argument. It would
seem safer to leave the default as-is, and only override it for boards
where Gen2 really is proven to work reliably. Which, er, is already the
case ;)
That said, "proven to work reliably" is itself a bit doubtful - my
NanoPC-T4 has always been rock-solid at Gen2 with a Samsung Evo 960
NVMe, yet I've seen plenty of reports of other NVMe models being
unusable with mainline due to failing link training ~90% of the time.
It's a grey area for sure.
Robin.
Signed-off-by: Peter Geis <pgwipeout@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 74f2c3d49095..e9efd330810b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -248,7 +248,7 @@
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
linux,pci-domain = <0>;
- max-link-speed = <1>;
+ max-link-speed = <2>;
msi-map = <0x0 &its 0x0 0x1000>;
phys = <&pcie_phy 0>, <&pcie_phy 1>,
<&pcie_phy 2>, <&pcie_phy 3>;
--
2.20.1
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