On Mon, Dec 23, 2019 at 8:00 AM Kever Yang <kever.yang@xxxxxxxxxxxxxx> wrote: > > > On 2019/12/21 下午3:54, Jagan Teki wrote: > > The Rockchip SPI controller's length register only supports 16-bits, > > yielding a maximum length of 64KiB (the CTRLR1 register holds "length - > > 1"). Trying to transfer more than that (e.g., with a large SPI flash > > read) will cause the driver to hang. > > > > Now, it seems that while theoretically we should be able to program > > CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to > > cause the core to choke, so stick with a maximum of 64K - 1 bytes -- > > i.e., 0xffff. > > > > Note, that the size is further divided into 'minus 1' while writing > > into CTRLR1. > > > > This change fixed two different read issues, > > > > 1. sf read failure when with > 0x10000 > > > > 2. Boot from SPI flash failed during spi_flash_read call in > > common/spl/spl_spi.c > > > > Observed and Tested in > > - Rockpro64 with Gigadevice flash > > - ROC-RK3399-PC with Winbond flash > > > > Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> > > Reviewed-by: Kever Yang <kever.yang@xxxxxxxxxxxxxx> Applied to u-boot-spi/master _______________________________________________ Linux-rockchip mailing list Linux-rockchip@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/linux-rockchip
