Hi Lorenzo,
Many thanks to look at this.
Missatge de Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> del dia dv.,
6 de des. 2019 a les 16:36:
>
> [+Eric]
>
> On Mon, Oct 28, 2019 at 11:32:42AM -0500, Rob Herring wrote:
> > The Rockchip host bridge driver doesn't need to store outboard resources
> > in its private struct as they are already stored in struct
> > pci_host_bridge.
> >
> > Cc: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
> > Cc: Andrew Murray <andrew.murray@xxxxxxx>
> > Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> > Cc: Heiko Stuebner <heiko@xxxxxxxxx>
> > Cc: linux-rockchip@xxxxxxxxxxxxxxxxxxx
> > Signed-off-by: Rob Herring <robh@xxxxxxxxxx>
> > ---
> > drivers/pci/controller/pcie-rockchip-host.c | 54 +++++++++------------
> > drivers/pci/controller/pcie-rockchip.h | 5 --
> > 2 files changed, 23 insertions(+), 36 deletions(-)
> >
> > diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
> > index 8d2e6f2e141e..f375e55ea02e 100644
> > --- a/drivers/pci/controller/pcie-rockchip-host.c
> > +++ b/drivers/pci/controller/pcie-rockchip-host.c
> > @@ -806,19 +806,28 @@ static int rockchip_pcie_prog_ib_atu(struct rockchip_pcie *rockchip,
> > static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
> > {
> > struct device *dev = rockchip->dev;
> > + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
> > + struct resource_entry *entry;
> > + u64 pci_addr, size;
> > int offset;
> > int err;
> > int reg_no;
> >
> > rockchip_pcie_cfg_configuration_accesses(rockchip,
> > AXI_WRAPPER_TYPE0_CFG);
> > + entry = resource_list_first_type(&bridge->windows, IORESOURCE_MEM);
> > + if (!entry)
> > + return -ENODEV;
> > +
> > + size = resource_size(entry->res);
> > + pci_addr = entry->res->start - entry->offset;
> > + rockchip->msg_bus_addr = pci_addr;
> >
> > - for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
> > + for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
> > err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
> > AXI_WRAPPER_MEM_WRITE,
> > 20 - 1,
> > - rockchip->mem_bus_addr +
> > - (reg_no << 20),
> > + pci_addr + (reg_no << 20),
> > 0);
> > if (err) {
> > dev_err(dev, "program RC mem outbound ATU failed\n");
> > @@ -832,14 +841,20 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
> > return err;
> > }
> >
> > - offset = rockchip->mem_size >> 20;
> > - for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
> > + entry = resource_list_first_type(&bridge->windows, IORESOURCE_IO);
> > + if (!entry)
> > + return -ENODEV;
> > +
> > + size = resource_size(entry->res);
> > + pci_addr = entry->res->start - entry->offset;
> > +
> > + offset = size >> 20;
>
> Just trying to find what triggers:
>
> https://lore.kernel.org/linux-pci/CAFqH_52BiQJzNEzd_0pB3K+JmzVOVikYQo0xfiC0J-DwiXdtqw@xxxxxxxxxxxxxx/T/#u
>
> I think this offset calculation changed the behaviour:
>
> Before:
>
> > - offset = rockchip->mem_size >> 20;
>
> Now:
>
> > + offset = size >> 20;
>
> size must be the IORESOURCE_MEM resource size instead we are using the
> IORESOURCE_IO size so IIUC the ATU window setup may be compromised.
>
Are you suggesting that something like this [1] fixes the issue?
Indeed,I don't see the warning with this applied and wifi which is
connected via pcie is working. But I don't get why the offset should
be from the MEM resource instead of the IO resource.
[1] https://pastebin.com/FBj95gNR
Thanks,
Enric
> Lorenzo
>
> > + for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
> > err = rockchip_pcie_prog_ob_atu(rockchip,
> > reg_no + 1 + offset,
> > AXI_WRAPPER_IO_WRITE,
> > 20 - 1,
> > - rockchip->io_bus_addr +
> > - (reg_no << 20),
> > + pci_addr + (reg_no << 20),
> > 0);
> > if (err) {
> > dev_err(dev, "program RC io outbound ATU failed\n");
> > @@ -852,8 +867,7 @@ static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
> > AXI_WRAPPER_NOR_MSG,
> > 20 - 1, 0, 0);
> >
> > - rockchip->msg_bus_addr = rockchip->mem_bus_addr +
> > - ((reg_no + offset) << 20);
> > + rockchip->msg_bus_addr += ((reg_no + offset) << 20);
> > return err;
> > }
> >
> > @@ -951,7 +965,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > struct pci_bus *bus, *child;
> > struct pci_host_bridge *bridge;
> > struct resource *bus_res;
> > - struct resource_entry *win;
> > int err;
> >
> > if (!dev->of_node)
> > @@ -997,27 +1010,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> >
> > rockchip->root_bus_nr = bus_res->start;
> >
> > - /* Get the I/O and memory ranges from DT */
> > - resource_list_for_each_entry(win, &bridge->windows) {
> > - switch (resource_type(win->res)) {
> > - case IORESOURCE_IO:
> > - io = win->res;
> > - io->name = "I/O";
> > - rockchip->io_size = resource_size(io);
> > - rockchip->io_bus_addr = io->start - win->offset;
> > - rockchip->io = io;
> > - break;
> > - case IORESOURCE_MEM:
> > - mem = win->res;
> > - mem->name = "MEM";
> > - rockchip->mem_size = resource_size(mem);
> > - rockchip->mem_bus_addr = mem->start - win->offset;
> > - break;
> > - default:
> > - continue;
> > - }
> > - }
> > -
> > err = rockchip_pcie_cfg_atu(rockchip);
> > if (err)
> > goto err_remove_irq_domain;
> > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
> > index 8e87a059ce73..bef42a803b56 100644
> > --- a/drivers/pci/controller/pcie-rockchip.h
> > +++ b/drivers/pci/controller/pcie-rockchip.h
> > @@ -304,13 +304,8 @@ struct rockchip_pcie {
> > struct irq_domain *irq_domain;
> > int offset;
> > struct pci_bus *root_bus;
> > - struct resource *io;
> > - phys_addr_t io_bus_addr;
> > - u32 io_size;
> > void __iomem *msg_region;
> > - u32 mem_size;
> > phys_addr_t msg_bus_addr;
> > - phys_addr_t mem_bus_addr;
> > bool is_rc;
> > struct resource *mem_res;
> > };
> > --
> > 2.20.1
> >
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