On 2019-09-02 13:46, Hans Verkuil wrote:
> On 9/1/19 2:45 PM, Jonas Karlman wrote:
>> Rockchip RK3399 SoC has the same Hantro G1 IP block
>> as RK3288, but the registers are entirely different.
>>
>> In a similar fashion as MPEG-2 and VP8 decoding,
>> it's simpler to just add a separate implementation.
>>
>> Signed-off-by: Jonas Karlman <jonas@xxxxxxxxx>
>> ---
>> drivers/staging/media/hantro/Makefile | 1 +
>> .../staging/media/hantro/hantro_g1_h264_dec.c | 1 -
>> drivers/staging/media/hantro/hantro_hw.h | 1 +
>> .../media/hantro/rk3399_vpu_hw_h264_dec.c | 486 ++++++++++++++++++
>> 4 files changed, 488 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/staging/media/hantro/rk3399_vpu_hw_h264_dec.c
>>
>> diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
>> index 5d6b0383d280..8d33b0e8aa6c 100644
>> --- a/drivers/staging/media/hantro/Makefile
>> +++ b/drivers/staging/media/hantro/Makefile
>> @@ -8,6 +8,7 @@ hantro-vpu-y += \
>> hantro_g1_mpeg2_dec.o \
>> hantro_g1_vp8_dec.o \
>> rk3399_vpu_hw_jpeg_enc.o \
>> + rk3399_vpu_hw_h264_dec.o \
>> rk3399_vpu_hw_mpeg2_dec.o \
>> rk3399_vpu_hw_vp8_dec.o \
>> hantro_jpeg.o \
>> diff --git a/drivers/staging/media/hantro/hantro_g1_h264_dec.c b/drivers/staging/media/hantro/hantro_g1_h264_dec.c
>> index 4b82b9fd5252..ec2736fb473d 100644
>> --- a/drivers/staging/media/hantro/hantro_g1_h264_dec.c
>> +++ b/drivers/staging/media/hantro/hantro_g1_h264_dec.c
>> @@ -202,7 +202,6 @@
>> #define G1_REG_REFBU_E(v) ((v) ? BIT(31) : 0)
>>
>> #define G1_REG_APF_THRESHOLD(v) (((v) << 0) & GENMASK(13, 0))
>> ->>>>>>> b22734fb5e2c... Ymedia: hantro: Refactor G1 H264 code
> ^^^^^^^^^^^^^^^
>
> Seems to be a left-over from patch 9?
Yes, thanks for noticing, looks like there was a small rebase issue, the line got added
in one patch and removed in the next. Will fix in next spin.
Regards,
Jonas
>
> Regards,
>
> Hans
>
>>
>> void hantro_g1_h264_dec_run(struct hantro_ctx *ctx)
>> {
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