On 2019/7/16 下午7:57, Jagan Teki wrote:
Add DdrTimingC0 structure with associated bit fields. These would help to reconfigure sdram capabilities during lpddr4 setup related configs. Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>
Reviewed-by: Kever Yang <Kever.yang@xxxxxxxxxxxxxx> Thanks, - Kever
--- arch/arm/include/asm/arch-rockchip/sdram_rk3399.h | 12 +++++++++++- drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h index 471702f935..7f41a67242 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h @@ -18,6 +18,16 @@ struct rk3399_ddr_pi_regs { u32 denali_pi[200]; };+union noc_ddrtimingc0 {+ u32 d32; + struct { + unsigned burstpenalty : 4; + unsigned reserved0 : 4; + unsigned wrtomwr : 6; + unsigned reserved1 : 18; + } b; +}; + struct rk3399_msch_regs { u32 coreid; u32 revisionid; @@ -36,7 +46,7 @@ struct rk3399_msch_regs { struct rk3399_msch_timings { u32 ddrtiminga0; u32 ddrtimingb0; - u32 ddrtimingc0; + union noc_ddrtimingc0 ddrtimingc0; u32 devtodev0; u32 ddrmode; u32 agingx0; diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 7f6f7d8a9a..e916448fc0 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1110,7 +1110,7 @@ static void dram_all_config(struct dram_info *dram, &ddr_msch_regs->ddrtiminga0); writel(noc_timing->ddrtimingb0, &ddr_msch_regs->ddrtimingb0); - writel(noc_timing->ddrtimingc0, + writel(noc_timing->ddrtimingc0.d32, &ddr_msch_regs->ddrtimingc0); writel(noc_timing->devtodev0, &ddr_msch_regs->devtodev0);
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