On Mon, Apr 01, 2019 at 10:17:22AM -0700, Douglas Anderson wrote: > Convert the AUO b101ean01 from using a fixed mode to specifying a > display timing with min/typ/max values. > > The AUO b101ean01's datasheet says: > * Vertical blanking min is 12 > * Horizontal blanking min is 60 > * Pixel clock is between 65.3 MHz and 75 MHz > > The goal here is to be able to specify the proper timing in device > tree to use on rk3288-veyron-minnie to match what the downstream > kernel is using so that it can used the fixed PLL. > > Changes in v4: > - display_timing for AUO b101ean01 new for v4. > > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> > --- > > drivers/gpu/drm/panel/panel-simple.c | 25 ++++++++++++------------- > 1 file changed, 12 insertions(+), 13 deletions(-) Acked-by: Thierry Reding <thierry.reding@xxxxxxxxx>
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