Am Dienstag, 7. M?rz 2017, 05:54:43 CET schrieb Stephen Boyd: > On 03/01, Heiko Stuebner wrote: > > Recent changes to the 8250-dw variant revealed issues concerning > > how the clock rates are handled on the rk3036 uart. > > > > For one, there was an error in the clock declaration, but also the > > shared uart-pll-select-mux also as default got supplied from the apll > > that also supplies the cpu and thus gets frequency scaled. > > > > The patches in this series remedy this and make the debug uart > > function again on 4.10 + current merge window. > > > > > > As for the merge-path, I've now tested all Rockchip socs I have access > > to (3036, 3288, 3368, 3399) and didn't find any more clock-related issues > > with the merge-window as of today. So if no other subtle issue turns up > > this week, these should be all fixes for the 4.11 cycle. > > So these 2 patches could be picked up by clock-maintainers directly if > > so desired, or I can send a pull request after the merge-window closes > > and we're save to say that nothing else broke. > > > > changes in v3: > > - use a direct register write, instead of using clock apis > > Great. I'm happy to merge this into clk-fixes now (and I will do > it now unless you have some need to send a pull request). Nope, go ahead ... it seems everything else survived the merge window just fine clk-wise
