[PATCH v3 5/9] clk: rockchip: fix up the pll clks error for rv1108 SoC

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Subject: [PATCH v3 5/9] clk: rockchip: fix up the pll clks error for rv1108 SoC
From: heiko@xxxxxxxxx (Heiko Stuebner)
Date: Tue, 08 Aug 2017 17:11:51 +0200
In-reply-to: <1502176675-32228-1-git-send-email-zhangqing@rock-chips.com>
References: <1502176547-30817-1-git-send-email-zhangqing@rock-chips.com> <1502176675-32228-1-git-send-email-zhangqing@rock-chips.com>

Am Dienstag, 8. August 2017, 15:17:55 CEST schrieb Elaine Zhang:
> fix up the lock_shift describe error.
> remove the ROCKCHIP_PLL_SYNC_RATE flag for gpll.
> 
> Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>

already picked the one from Andy's v2, so ignored this one


Heiko

References:
- [PATCH v3 0/9] clk: rockchip: support clk for RV1108 Soc
  - From: Elaine Zhang
- [PATCH v3 5/9] clk: rockchip: fix up the pll clks error for rv1108 SoC
  - From: Elaine Zhang

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