+Stephen, Mike and the linux-clk ML. On Fri, 4 Aug 2017 20:45:04 +0800 "David.Wu" <david.wu at rock-chips.com> wrote: > Hi Boris & Heiko, > > ? 2016/3/31 4:03, Boris BREZILLON ??: > > + /* Keep the PWM clk enabled if the PWM appears to be up and running. */ > > + pwm_get_state(pc->chip.pwms, &pstate); > > + if (!pstate.enabled) > > + clk_disable(pc->clk); > > We found a issue recently, if the pwm0 is not enabled at uboot and pwm2 > is enabled at uboot, the PWM clock will be disabled at pwm0's probe. It > is true to close the pwm clock, and the pwm2 can't work during a while, > until the pwm2 probe, because the pwm0 and pwm2 are the same clock for > their work. In fact, the pwm0 can not know the pwm2's status. > > So we need to get all the PWMs state in a public place where it's early > than the PWM probe, if that's the way it is. Then keep the PWM clk > enabled if theis is one PWM appears to be up and running. The place > maybe in the clock core init, like adding pwm clock as critial one. > > Another way is that we don't enable pwm clock firstly at PWM probe, > because whether or not the PWM state has been enabled in the Uboot, like > other modules, our chip default PWM clock registers are enabled at the > beginning, read the PWM registers directly to know the PWM state. Then > if the PWM state is enabled, call the enable_clk(pc->clk) to add the > clock count=1. If the PWM state is disabled, we do nothing. After all > the PWMs are probed and all modules are probed, the clock core will gate > the PWM clock if the clock count is 0, and keep clk enabled if the clock > count is not 0. > > How do you feel about it? Ouch. That's indeed hard to solve in a clean way. I may have something to suggest but I'm not sure clk maintainers will like it: what if we make clk_disable() and clk_unprepare() just decrement the refcount before the disable-unused-clks procedure has been executed (see proposed patch below)? This way all clks that have been enabled by the bootloader will stay in such state until all drivers have had a chance to retain them (IOW, call clk_prepare()+clk_enable()). BTW, I think the problem you're describing here is not unique to PWM devices, it's just that now, some PWM drivers are smart and try to keep clks enabled to prevent glitches. --->8---
