? 2016/9/27 6:35, Heiko Stuebner ??:
> Am Samstag, 24. September 2016, 18:24:11 CEST schrieb Shawn Lin:
>> On 2016/9/24 2:26, Jacob Chen wrote:
>>> From: Jacob Chen <jacob2.chen at rock-chips.com>
>>>
>>> In some drivers, disable_irq() call don't be symmetric with enable_irq()
>>> , disable_irq() will be called before call free_irq().
>>
>> Which upstream drivers you refer to?
>>
>> Shouldn't it be the unbalanced call for these drivers?
>>
>>> But both disable_irq() and free_irq() will call
>>> rockchip_irq_gc_mask_set_bit,>
>>> and clk_disable() will be called more times than clk_enable(), which will
>>>
>>> cause bugs.
>>>
>>> I think we can correct that by checking of mask.If mask is already set, do
>>> nothing.
>> Looks like a little hacky to me.
>
> that may be true, but on first glance I tend to agree with Jacob.
> Look for example at (a driver using disable_irq I picked at random) drivertc/
> rtcrs/-tps6586x.c .
yep, I took a quick look at the files you pointed to, and it seems
there should be the problems for what this patch to deal with. Probably
I didn't see this error since the drivers we was using happened to
handle it properly but maybe not for other drivers. I am okay if this
could solve problems for Jacob.
>
> In its probe function it does devm_request_irq directly followed by
> disable_irq on its alarm interrupt. The interrupt only gets enabled again if
> the rtc alarm gets enabled. So you can easily run into the disable + free case
> there as well. Similar probably in a lot of other drivers.
>
>
> Heiko
>
>>
>>> Change-Id: If19912c7658253e15531c04db6c70fdbffd5960a
>>
>> remove this.
>>
>>> Signed-off-by: Jacob Chen <jacob2.chen at rock-chips.com>
>>> ---
>>>
>>> drivers/pinctrl/pinctrl-rockchip.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/pinctrl/pinctrl-rockchip.c
>>> b/drivers/pinctrl/pinctrl-rockchip.c index c6c04ac..9a8804a 100644
>>> --- a/drivers/pinctrl/pinctrl-rockchip.c
>>> +++ b/drivers/pinctrl/pinctrl-rockchip.c
>>> @@ -2334,8 +2334,12 @@ static void rockchip_irq_gc_mask_clr_bit(struct
>>> irq_data *d)>
>>> void rockchip_irq_gc_mask_set_bit(struct irq_data *d)
>>> {
>>>
>>> struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
>>>
>>> + struct irq_chip_type *ct = irq_data_get_chip_type(d);
>>>
>>> struct rockchip_pin_bank *bank = gc->private;
>>>
>>> + if (*ct->mask_cache & d->mask)
>>> + return;
>>> +
>>>
>>> irq_gc_mask_set_bit(d);
>>> clk_disable(bank->clk);
>>>
>>> }
>>>
>>> --
>>> 2.7.4
>>>
>>>
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>
>
>
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--
Best Regards
Shawn Lin
