On 2016/9/22 18:21, Ulf Hansson wrote: > On 22 September 2016 at 12:06, Shawn Lin <shawn.lin at rock-chips.com> wrote: >> Hi ulf, >> >> ? 2016/9/22 17:38, Ulf Hansson ??: >>> >>> On 21 September 2016 at 03:43, Shawn Lin <shawn.lin at rock-chips.com> wrote: >>>> >>>> Per JESD84-B51 P69, Host need to change frequency to <=52MHz after >>>> setting HS_TIMING to 0x1, and host may changes frequency to <= 200MHz >>>> after setting HS_TIMING to 0x3. It seems there is no difference if >>>> we don't change frequency to <= 52MHz as f_init is already less than >>>> 52MHz. But actually it does make difference. When doing compatibility >>>> test we see failures for some eMMC devices without changing the >>>> frequency to hs_max_dtr. And let's read the spec again, we could see >>>> that "Host may changes frequency to 200MHz" implies that it's not >>>> mandatory. But the "Host need to change frequency to <= 52MHz" implies >>>> that we should do this. >>> >>> >>> I don't get this. Are you saying that f_init > 52 MHz? That should not >>> be impossible, right!? >> >> >> nope, I was saying that the spec implies we to set clock after >> setting HS_TIMING to 0x1 when doing hs400es selection. >> >> I thought there is no difference because the spec says "Host need to >> change frequency to <= 52MHz", and the f_init(<=400k) is <= 52MHz, >> right? So I didn't set clock to hs_max_dtr. But I think I misunderstood >> the spec, so this patch will fix this. > > Okay, I see what you mean now! > > In other words: > The card expects the clock rate to increase from the current used > f_init (which is <= 400KHz), but still being <= 52MHz, when you have > set HS_TIMING to 0x1. > > Okay, we can do that change! Could you try to improve the change log a > little bit or you want me to help? yep, I could change the commit msg a bit and fix another copy-paste error, then respin v2. BTW, I noticed you have applied one of these 5 patches, so I will remove that one for V2. Thanks, Ulf. > > Kind regards > Uffe > > > -- Best Regards Shawn Lin
