Dear Rob, On 2016/7/11 23:13, Rob Herring wrote: > On Thu, Jul 07, 2016 at 10:58:44AM +0800, William Wu wrote: >> This patch adds the devicetree documentation required for Rockchip >> USB3.0 core wrapper consisting of USB3.0 IP from Synopsys. >> >> It supports DRD mode, and could operate in device mode (SS, HS, FS) >> and host mode (SS, HS, FS, LS). >> >> Signed-off-by: William Wu <william.wu at rock-chips.com> >> --- >> Changes in v6: >> - rename bus_clk, and add usbdrd3_1 node as an example (Heiko) >> >> Changes in v5: >> - rename clock-names, and remove unnecessary clocks (Heiko) >> >> Changes in v4: >> - modify commit log, and add phy documentation location (Sergei) >> >> Changes in v3: >> - add dwc3 address (balbi) >> >> Changes in v2: >> - add rockchip,dwc3.txt to Documentation/devicetree/bindings/ (balbi, Brian) >> >> .../devicetree/bindings/usb/rockchip,dwc3.txt | 59 ++++++++++++++++++++++ >> 1 file changed, 59 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt > Acked-by: Rob Herring <robh at kernel.org> Thanks a lot. I'll add Acked-by next patch. > > >
