On 01/20/2016 01:49 PM, Heiko Stuebner wrote:
> Both clusters have their mux bit in bit 7 of their respective register.
> For whatever reason the big cluster currently lists bit 15 which is
> definitly wrong.
>
> Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
> Reported-by: Zhang Qing <zhangqing at rock-chips.com>
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> ---
> I plan to include them into my clk-fixes branch, so posted for reference
> and possible objections ;-)
None of these patches are fixes to regressions introduced in the merge
window for v4.5, so we wouldn't be considering them for clk-fixes. We
can certainly queue them up in clk-next for v4.6 and let stable process
funnel them to the right stable trees though.
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