Hi, Mark:
Another way to solve this bug is add runtime PM support while spi setup.
Some other chips may have some problem, for example mt65xx and orion,
which access hardware register too.
On 2016?02?24? 18:00, Huibin Hong wrote:
> Rockchip_spi_set_cs could be called by spi_setup, but
> spi_setup may be called by device driver after runtime suspend.
> Then the spi clock is closed, rockchip_spi_set_cs may access the
> spi registers, which causes cpu block in some socs.
>
> Fixes: 64e36824b32 ("spi/rockchip: add driver for Rockchip RK3xxx")
> Cc: Addy Ke <addy.ke at rockchip.com>
> Cc: shawn.lin <shawn.lin at kernel-upstream.org>
> Signed-off-by: Huibin Hong <huibin.hong at rock-chips.com>
> ---
>
> drivers/spi/spi-rockchip.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
> index 79a8bc4..035767c 100644
> --- a/drivers/spi/spi-rockchip.c
> +++ b/drivers/spi/spi-rockchip.c
> @@ -265,7 +265,10 @@ static inline u32 rx_max(struct rockchip_spi *rs)
> static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
> {
> u32 ser;
> - struct rockchip_spi *rs = spi_master_get_devdata(spi->master);
> + struct spi_master *master = spi->master;
> + struct rockchip_spi *rs = spi_master_get_devdata(master);
> +
> + pm_runtime_get_sync(rs->dev);
>
> ser = readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & SER_MASK;
>
> @@ -290,6 +293,8 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
> ser &= ~(1 << spi->chip_select);
>
> writel_relaxed(ser, rs->regs + ROCKCHIP_SPI_SER);
> +
> + pm_runtime_put_sync(rs->dev);
> }
>
> static int rockchip_spi_prepare_message(struct spi_master *master,
> --
> 1.9.1
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
>
>
