Hi Shawn, On 2016?08?31? 09:37, Shawn Lin wrote: > We are intent on letting the sdhci variant driver handle this > optional clock on rk3399 platform now. > > Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com> > --- Thanks for your patch, we can gate aclk_emmcgrf now as soon as sdhci driver suspend. Reviewed-by: Ziyuan Xu <xzy.xu at rock-chips.com> Tested-by: Ziyuan Xu <xzy.xu at rock-chips.com> > > Changes in v2: None > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index bc86e8c..d26c6ad 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -233,8 +233,9 @@ > arasan,soc-ctl-syscon = <&grf>; > assigned-clocks = <&cru SCLK_EMMC>; > assigned-clock-rates = <200000000>; > - clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; > - clock-names = "clk_xin", "clk_ahb"; > + clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>, > + <&cru ACLK_EMMC_GRF>; > + clock-names = "clk_xin", "clk_ahb", "clk_syscon"; > clock-output-names = "emmc_cardclock"; > #clock-cells = <0>; > phys = <&emmc_phy>;
