On 11/19/2015 10:19 AM, Felipe Balbi wrote: > > Hi, > > Doug Anderson <dianders at chromium.org> writes: >>>>> isn't this a regression ? You're first clearing the interrupts and only >>>>> then reading to check what's pending, however, what's pending has just >>>>> been cleared. Seems like this should be: >>>>> >>>>> hprt0 = dwc2_readl(HPRT0); >>>>> dwc2_writeal(PRTINT, GINTSTS); >>>> >>>> Actually, we could probably remove the setting of GINTSTS_PRTINT >>>> completely. The docs I have say that the GINTSTS_PRTINT is read only >>>> and that: >>>> >>>>> The core sets this bit to indicate a change in port status of one of the >>>>> DWC_otg core ports in Host mode. The application must read the >>>>> Host Port Control and Status (HPRT) register to determine the exact >>>>> event that caused this interrupt. The application must clear the >>>>> appropriate status bit in the Host Port Control and Status register to >>>>> clear this bit. >>>> >>>> ...so writing PRTINT is probably useless, but John can confirm. >>>> >>> >>> Yup, it seems it can be removed. >> >> How do you guys want this handled? Should I send up a new version of >> this patch? ...or should I send a followon patch that does this >> removal? > > I'll leave the final decision to John, but my opinion is that a new > version of the patch would be preferrable. > Hi Doug, Could you resend with the change? Regards, John
