Mark, ? 2015?01?22? 11:15, Mark Yao ??: > Vop set wrong vsync/hsync polarity, it may cause some > display problem. known problem is that caused HDMI hdcp > authenticate failed, caused pixel offset with hdmi display. > the polarity description at RK3288 TRM doc: > dsp_vsync_pol > VSYNC polarity > 1'b0 : negative > 1'b1 : positive > dsp_hsync_pol > HSYNC polarity > 1'b0 : negative > 1'b1 : positive > > Signed-off-by: Mark Yao <mark.yao at rock-chips.com> > --- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 9a5c571..2b145ba5 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -874,8 +874,8 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, > VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); > > val = 0x8; > - val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0; > - val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 1) : 0; > + val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; > + val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); Tested-by: Caesar Wang <wxt at rock-chips.com> > VOP_CTRL_SET(vop, pin_pol, val); > > VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
