hi
On Tue, Sep 9, 2014 at 5:16 AM, Doug Anderson <dianders at chromium.org> wrote:
> Heiko,
>
> On Fri, Sep 5, 2014 at 4:06 PM, Heiko Stuebner <heiko at sntech.de> wrote:
>> Add basic OPP entries for current supported Rockchip SoCs.
>> The operating points are currently very conservative, so individual
>> boards may opt to redefine them.
>>
>> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
>> ---
>> arch/arm/boot/dts/rk3066a.dtsi | 12 +++++++++++-
>> arch/arm/boot/dts/rk3188.dtsi | 15 ++++++++++++++-
>> arch/arm/boot/dts/rk3288.dtsi | 17 ++++++++++++++++-
>> 3 files changed, 41 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
>> index 879a818..572c30b 100644
>> --- a/arch/arm/boot/dts/rk3066a.dtsi
>> +++ b/arch/arm/boot/dts/rk3066a.dtsi
>> @@ -26,11 +26,21 @@
>> #size-cells = <0>;
>> enable-method = "rockchip,rk3066-smp";
>>
>> - cpu at 0 {
>> + cpu0: cpu at 0 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a9";
>> next-level-cache = <&L2>;
>> reg = <0x0>;
>> + operating-points = <
>> + /* kHz uV */
>> + 1008000 1075000
>> + 816000 1025000
>> + 600000 1025000
>> + 504000 1000000
>> + 312000 975000
>> + >;
>> + clock-latency = <40000>;
>> + clocks = <&cru ARMCLK>;
>> };
>> cpu at 1 {
>> device_type = "cpu";
>> diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
>> index ee801a9..e237216 100644
>> --- a/arch/arm/boot/dts/rk3188.dtsi
>> +++ b/arch/arm/boot/dts/rk3188.dtsi
>> @@ -26,11 +26,24 @@
>> #size-cells = <0>;
>> enable-method = "rockchip,rk3066-smp";
>>
>> - cpu at 0 {
>> + cpu0: cpu at 0 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a9";
>> next-level-cache = <&L2>;
>> reg = <0x0>;
>> + operating-points = <
>> + /* kHz uV */
>> + 1608000 1350000
>> + 1416000 1250000
>> + 1200000 1150000
>> + 1008000 1075000
>> + 816000 975000
>> + 600000 950000
>> + 504000 925000
>> + 312000 875000
>> + >;
>> + clock-latency = <40000>;
>> + clocks = <&cru ARMCLK>;
>> };
>> cpu at 1 {
>> device_type = "cpu";
>> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
>> index 5950b0a..9275a47 100644
>> --- a/arch/arm/boot/dts/rk3288.dtsi
>> +++ b/arch/arm/boot/dts/rk3288.dtsi
>> @@ -40,10 +40,25 @@
>> #address-cells = <1>;
>> #size-cells = <0>;
>>
>> - cpu at 500 {
>> + cpu0: cpu at 500 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a12";
>> reg = <0x500>;
>> + operating-points = <
>> + /* KHz uV */
>> + 1416000 1150000
>> + 1200000 1050000
>> + 1008000 1000000
>> + 816000 950000
>> + 696000 900000
>> + 600000 850000
>> + 408000 850000
>> + 312000 850000
>> + 216000 850000
>> + 126000 850000
>> + >;
>
> This doesn't quite match the ordering that Kever put up most recently
> at <https://chromium-review.googlesource.com/#/c/211862/2/arch/arm/boot/dts/rk3288.dtsi>.
> Specifically, he has:
>
> 1800000 1300000
> 1608000 1200000
> 1416000 1150000
> 1200000 1100000
> 1008000 1050000
> [ 816000 1000000
> 600000 900000
> 408000 850000
> 216000 850000
> 126000 850000
in Rockchip R-BOX SDK(for Box/HDMI dongle), voltage is bit higher...
https://bitbucket.org/T-Firefly/firefly-rk3288/src/ab220fdc428283b2358644eec36059bb58b429a0/kernel/arch/arm/boot/dts/rk3288-box.dts?at=master#cl-557
126000 900000
216000 900000
312000 900000
408000 900000
600000 950000
696000 950000
816000 1000000
1008000 1050000
1200000 1100000
1416000 1200000
1512000 1300000
1608000 1350000
1704000 1350000
1800000 1350000
and there are different set of values in other rk3288-*.dts.
(I don't know which is correct, sorry)
