R-Car Gen3 and Gen4 have some differences in the shift bits. Add a
shift table to handle these differences. After this drop the unused
functions reg_gen4() and is_gen4().
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v4->v5:
* Collected tag.
* Dropped RCANFD_FIRST_RNC_SH and RCANFD_SECOND_RNC_SH by using a
formula (32 - (n % rnc_per_reg + 1) * rnc_field_width.
v3->v4:
* Added prefix RCANFD_* to enum rcar_canfd_shift_id.
v3:
* New patch.
---
drivers/net/can/rcar/rcar_canfd.c | 70 ++++++++++++++++++++++---------
1 file changed, 51 insertions(+), 19 deletions(-)
diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
index e019e941122f..4ba8e51242d3 100644
--- a/drivers/net/can/rcar/rcar_canfd.c
+++ b/drivers/net/can/rcar/rcar_canfd.c
@@ -112,13 +112,16 @@
/* RSCFDnCFDCmNCFG - CAN FD only */
#define RCANFD_NCFG_NTSEG2(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_NTSEG2_MASK]) << reg_gen4(gpriv, 25, 24))
+ (((x) & (gpriv)->info->mask_table[RCANFD_NTSEG2_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_NTSEG2_SH])
#define RCANFD_NCFG_NTSEG1(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_NTSEG1_MASK]) << reg_gen4(gpriv, 17, 16))
+ (((x) & (gpriv)->info->mask_table[RCANFD_NTSEG1_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_NTSEG1_SH])
#define RCANFD_NCFG_NSJW(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_NSJW_MASK]) << reg_gen4(gpriv, 10, 11))
+ (((x) & (gpriv)->info->mask_table[RCANFD_NSJW_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_NSJW_SH])
#define RCANFD_NCFG_NBRP(x) (((x) & 0x3ff) << 0)
@@ -183,10 +186,12 @@
#define RCANFD_DCFG_DSJW(gpriv, x) (((x) & (gpriv)->info->mask_table[RCANFD_DSJW_MASK]) << 24)
#define RCANFD_DCFG_DTSEG2(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_DTSEG2_MASK]) << reg_gen4(gpriv, 16, 20))
+ (((x) & (gpriv)->info->mask_table[RCANFD_DTSEG2_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_DTSEG2_SH])
#define RCANFD_DCFG_DTSEG1(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_DTSEG1_MASK]) << reg_gen4(gpriv, 8, 16))
+ (((x) & (gpriv)->info->mask_table[RCANFD_DTSEG1_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_DTSEG1_SH])
#define RCANFD_DCFG_DBRP(x) (((x) & 0xff) << 0)
@@ -228,10 +233,11 @@
/* RSCFDnCFDCFCCk */
#define RCANFD_CFCC_CFTML(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[RCANFD_CFTML_MASK]) << reg_gen4(gpriv, 16, 20))
-#define RCANFD_CFCC_CFM(gpriv, x) (((x) & 0x3) << reg_gen4(gpriv, 8, 16))
+ (((x) & (gpriv)->info->mask_table[RCANFD_CFTML_MASK]) << \
+ (gpriv)->info->shift_table[RCANFD_CFTML_SH])
+#define RCANFD_CFCC_CFM(gpriv, x) (((x) & 0x3) << (gpriv)->info->shift_table[RCANFD_CFM_SH])
#define RCANFD_CFCC_CFIM BIT(12)
-#define RCANFD_CFCC_CFDC(gpriv, x) (((x) & 0x7) << reg_gen4(gpriv, 21, 8))
+#define RCANFD_CFCC_CFDC(gpriv, x) (((x) & 0x7) << (gpriv)->info->shift_table[RCANFD_CFDC_SH])
#define RCANFD_CFCC_CFPLS(x) (((x) & 0x7) << 4)
#define RCANFD_CFCC_CFTXIE BIT(2)
#define RCANFD_CFCC_CFE BIT(0)
@@ -523,11 +529,23 @@ enum rcar_canfd_mask_id {
RCANFD_CFTML_MASK, /* Common FIFO TX Message Buffer Link */
};
+enum rcar_canfd_shift_id {
+ RCANFD_NTSEG2_SH, /* Nominal Bit Rate Time Segment 2 Control */
+ RCANFD_NTSEG1_SH, /* Nominal Bit Rate Time Segment 1 Control */
+ RCANFD_NSJW_SH, /* Nominal Bit Rate Resynchronization Jump Width Control */
+ RCANFD_DTSEG2_SH, /* Data Bit Rate Time Segment 2 Control */
+ RCANFD_DTSEG1_SH, /* Data Bit Rate Time Segment 1 Control */
+ RCANFD_CFTML_SH, /* Common FIFO TX Message Buffer Link */
+ RCANFD_CFM_SH, /* Common FIFO Mode */
+ RCANFD_CFDC_SH, /* Common FIFO Depth Configuration */
+};
+
struct rcar_canfd_global;
struct rcar_canfd_hw_info {
const u32 *mask_table;
const u16 *regs;
+ const u8 *shift_table;
u16 num_supported_rules;
u8 rnc_field_width;
u8 max_channels;
@@ -649,8 +667,31 @@ static const u32 rcar_gen4_mask_table[] = {
[RCANFD_CFTML_MASK] = 0x1f,
};
+static const u8 rcar_gen3_shift_table[] = {
+ [RCANFD_NTSEG2_SH] = 24,
+ [RCANFD_NTSEG1_SH] = 16,
+ [RCANFD_NSJW_SH] = 11,
+ [RCANFD_DTSEG2_SH] = 20,
+ [RCANFD_DTSEG1_SH] = 16,
+ [RCANFD_CFTML_SH] = 20,
+ [RCANFD_CFM_SH] = 16,
+ [RCANFD_CFDC_SH] = 8,
+};
+
+static const u8 rcar_gen4_shift_table[] = {
+ [RCANFD_NTSEG2_SH] = 25,
+ [RCANFD_NTSEG1_SH] = 17,
+ [RCANFD_NSJW_SH] = 10,
+ [RCANFD_DTSEG2_SH] = 16,
+ [RCANFD_DTSEG1_SH] = 8,
+ [RCANFD_CFTML_SH] = 16,
+ [RCANFD_CFM_SH] = 8,
+ [RCANFD_CFDC_SH] = 21,
+};
+
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
.mask_table = rcar_gen3_mask_table,
+ .shift_table = rcar_gen3_shift_table,
.regs = rcar_gen3_regs,
.num_supported_rules = 256,
.rnc_field_width = 8,
@@ -661,6 +702,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {
.mask_table = rcar_gen4_mask_table,
+ .shift_table = rcar_gen4_shift_table,
.regs = rcar_gen4_regs,
.num_supported_rules = 512,
.rnc_field_width = 16,
@@ -673,6 +715,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {
static const struct rcar_canfd_hw_info rzg2l_hw_info = {
.mask_table = rcar_gen3_mask_table,
+ .shift_table = rcar_gen3_shift_table,
.regs = rcar_gen3_regs,
.num_supported_rules = 256,
.rnc_field_width = 8,
@@ -682,17 +725,6 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = {
};
/* Helper functions */
-static inline bool is_gen4(struct rcar_canfd_global *gpriv)
-{
- return gpriv->info == &rcar_gen4_hw_info;
-}
-
-static inline u32 reg_gen4(struct rcar_canfd_global *gpriv,
- u32 gen4, u32 not_gen4)
-{
- return is_gen4(gpriv) ? gen4 : not_gen4;
-}
-
static inline void rcar_canfd_update(u32 mask, u32 val, u32 __iomem *reg)
{
u32 data = readl(reg);
--
2.43.0
