Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC

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On Sun, Mar 2, 2025 at 9:39 PM Andrew Lunn <andrew@xxxxxxx> wrote:
>
> > > > I can certainly do that, but not sure in the DT we will be describing
> > > > the HW correctly then. I'll have to hide *-180  clocks In the DT and
> > > > handle and turning on/off these clocks in the clock driver.
> > > ...
> > > >              clocks =  <&cpg CPG_MOD 0xbd>,
> > > >                             <&cpg CPG_MOD 0xbc>,
> > > >                             <&cpg CPG_CORE R9A09G057_GBETH_0_CLK_PTP_REF_I>,
> > > >                             <&cpg CPG_MOD 0xb8>,
> > > >                             <&cpg CPG_MOD 0xb9>,
> > > >                             <&cpg CPG_MOD 0xba>,
> > > >                             <&cpg CPG_MOD 0xbb>;
> > >
> > > Your SoC designer really implemented the 0° and 180° as two separate
> > > independently controllable clocks?
> > >
> > Yes there are separate bits to turn ON/OFF the 0° and 180° clocks.
>
> Do you know what the clock tree actually looks like? I can think of
> two different ways this could be implemented:
>
> ----+----------on/off---
>     |
>     +----not---on/off---
>
> or
>
> -------on/off-+------------------
>               |
>               +---not---on/off---
>
> In the first, the clocks are siblings. In the second there is
> parent/child relationship.
>
It's the first case in this SoC.

Cheers,
Prabhakar





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