R-Car Gen3 and Gen4 has some differences in the shift bits. Add a
shift table to handle these differences. After this drop the unused
functions reg_gen4() and is_gen4().
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v3:
* New patch.
---
drivers/net/can/rcar/rcar_canfd.c | 78 ++++++++++++++++++++++---------
1 file changed, 56 insertions(+), 22 deletions(-)
diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
index fcf5cb93f57c..09a9e548b022 100644
--- a/drivers/net/can/rcar/rcar_canfd.c
+++ b/drivers/net/can/rcar/rcar_canfd.c
@@ -90,11 +90,13 @@
/* RSCFDnCFDGAFLCFG0 / RSCFDnGAFLCFG0 */
#define RCANFD_GAFLCFG_SETRNC(gpriv, n, x) \
(((x) & (gpriv)->info->mask_table[RNC_MASK_ID]) << \
- (reg_gen4(gpriv, 16, 24) - ((n) & 1) * reg_gen4(gpriv, 16, 8)))
+ ((gpriv)->info->shift_table[FIRST_RNC_SH] - ((n) & 1) * \
+ (gpriv)->info->shift_table[SECOND_RNC_SH]))
#define RCANFD_GAFLCFG_GETRNC(gpriv, n, x) \
- (((x) >> (reg_gen4(gpriv, 16, 24) - ((n) & 1) * reg_gen4(gpriv, 16, 8))) & \
- (gpriv)->info->mask_table[RNC_MASK_ID])
+ (((x) >> ((gpriv)->info->shift_table[FIRST_RNC_SH] - ((n) & 1) * \
+ (gpriv)->info->shift_table[SECOND_RNC_SH])) & \
+ (gpriv)->info->mask_table[RNC_MASK_ID])
/* RSCFDnCFDGAFLECTR / RSCFDnGAFLECTR */
#define RCANFD_GAFLECTR_AFLDAE BIT(8)
@@ -117,13 +119,13 @@
/* RSCFDnCFDCmNCFG - CAN FD only */
#define RCANFD_NCFG_NTSEG2(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[NTSEG2_MASK_ID]) << reg_gen4(gpriv, 25, 24))
+ (((x) & (gpriv)->info->mask_table[NTSEG2_MASK_ID]) << (gpriv)->info->shift_table[NTSEG2_SH])
#define RCANFD_NCFG_NTSEG1(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[NTSEG1_MASK_ID]) << reg_gen4(gpriv, 17, 16))
+ (((x) & (gpriv)->info->mask_table[NTSEG1_MASK_ID]) << (gpriv)->info->shift_table[NTSEG1_SH])
#define RCANFD_NCFG_NSJW(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[NSJW_MASK_ID]) << reg_gen4(gpriv, 10, 11))
+ (((x) & (gpriv)->info->mask_table[NSJW_MASK_ID]) << (gpriv)->info->shift_table[NSJW_SH])
#define RCANFD_NCFG_NBRP(x) (((x) & 0x3ff) << 0)
@@ -188,10 +190,10 @@
#define RCANFD_DCFG_DSJW(gpriv, x) (((x) & (gpriv)->info->mask_table[DSJW_MASK_ID]) << 24)
#define RCANFD_DCFG_DTSEG2(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[DTSEG2_MASK_ID]) << reg_gen4(gpriv, 16, 20))
+ (((x) & (gpriv)->info->mask_table[DTSEG2_MASK_ID]) << (gpriv)->info->shift_table[DTSEG2_SH])
#define RCANFD_DCFG_DTSEG1(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[DTSEG1_MASK_ID]) << reg_gen4(gpriv, 8, 16))
+ (((x) & (gpriv)->info->mask_table[DTSEG1_MASK_ID]) << (gpriv)->info->shift_table[DTSEG1_SH])
#define RCANFD_DCFG_DBRP(x) (((x) & 0xff) << 0)
@@ -233,10 +235,10 @@
/* RSCFDnCFDCFCCk */
#define RCANFD_CFCC_CFTML(gpriv, x) \
- (((x) & (gpriv)->info->mask_table[CFTML_MASK_ID]) << reg_gen4(gpriv, 16, 20))
-#define RCANFD_CFCC_CFM(gpriv, x) (((x) & 0x3) << reg_gen4(gpriv, 8, 16))
+ (((x) & (gpriv)->info->mask_table[CFTML_MASK_ID]) << (gpriv)->info->shift_table[CFTML_SH])
+#define RCANFD_CFCC_CFM(gpriv, x) (((x) & 0x3) << (gpriv)->info->shift_table[CFM_SH])
#define RCANFD_CFCC_CFIM BIT(12)
-#define RCANFD_CFCC_CFDC(gpriv, x) (((x) & 0x7) << reg_gen4(gpriv, 21, 8))
+#define RCANFD_CFCC_CFDC(gpriv, x) (((x) & 0x7) << (gpriv)->info->shift_table[CFDC_SH])
#define RCANFD_CFCC_CFPLS(x) (((x) & 0x7) << 4)
#define RCANFD_CFCC_CFTXIE BIT(2)
#define RCANFD_CFCC_CFE BIT(0)
@@ -530,11 +532,25 @@ enum rcar_canfd_mask_id {
CFTML_MASK_ID, /* Common FIFO TX Message Buffer Link */
};
+enum rcar_canfd_shift_id {
+ FIRST_RNC_SH, /* Rule Number for Channel x */
+ SECOND_RNC_SH, /* Rule Number for Channel x + 1 */
+ NTSEG2_SH, /* Nominal Bit Rate Time Segment 2 Control */
+ NTSEG1_SH, /* Nominal Bit Rate Time Segment 1 Control */
+ NSJW_SH, /* Nominal Bit Rate Resynchronization Jump Width Control */
+ DTSEG2_SH, /* Data Bit Rate Time Segment 2 Control */
+ DTSEG1_SH, /* Data Bit Rate Time Segment 1 Control */
+ CFTML_SH, /* Common FIFO TX Message Buffer Link */
+ CFM_SH, /* Common FIFO Mode */
+ CFDC_SH, /* Common FIFO Depth Configuration */
+};
+
struct rcar_canfd_global;
struct rcar_canfd_hw_info {
const u32 *mask_table;
const u16 *regs;
+ const u8 *shift_table;
u8 max_channels;
u8 postdiv;
/* hardware features */
@@ -658,8 +674,35 @@ static const u32 rcar_gen4_mask_table[] = {
[CFTML_MASK_ID] = 0x1f,
};
+static const u8 rcar_gen3_shift_table[] = {
+ [FIRST_RNC_SH] = 24,
+ [SECOND_RNC_SH] = 8,
+ [NTSEG2_SH] = 24,
+ [NTSEG1_SH] = 16,
+ [NSJW_SH] = 11,
+ [DTSEG2_SH] = 20,
+ [DTSEG1_SH] = 16,
+ [CFTML_SH] = 20,
+ [CFM_SH] = 16,
+ [CFDC_SH] = 8,
+};
+
+static const u8 rcar_gen4_shift_table[] = {
+ [FIRST_RNC_SH] = 16,
+ [SECOND_RNC_SH] = 16,
+ [NTSEG2_SH] = 25,
+ [NTSEG1_SH] = 17,
+ [NSJW_SH] = 10,
+ [DTSEG2_SH] = 16,
+ [DTSEG1_SH] = 8,
+ [CFTML_SH] = 16,
+ [CFM_SH] = 8,
+ [CFDC_SH] = 21,
+};
+
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
.mask_table = rcar_gen3_mask_table,
+ .shift_table = rcar_gen3_shift_table,
.regs = rcar_gen3_regs,
.max_channels = 2,
.postdiv = 2,
@@ -668,6 +711,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {
.mask_table = rcar_gen4_mask_table,
+ .shift_table = rcar_gen4_shift_table,
.regs = rcar_gen4_regs,
.max_channels = 8,
.postdiv = 2,
@@ -678,6 +722,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {
static const struct rcar_canfd_hw_info rzg2l_hw_info = {
.mask_table = rcar_gen3_mask_table,
+ .shift_table = rcar_gen3_shift_table,
.regs = rcar_gen3_regs,
.max_channels = 2,
.postdiv = 1,
@@ -685,17 +730,6 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = {
};
/* Helper functions */
-static inline bool is_gen4(struct rcar_canfd_global *gpriv)
-{
- return gpriv->info == &rcar_gen4_hw_info;
-}
-
-static inline u32 reg_gen4(struct rcar_canfd_global *gpriv,
- u32 gen4, u32 not_gen4)
-{
- return is_gen4(gpriv) ? gen4 : not_gen4;
-}
-
static inline void rcar_canfd_update(u32 mask, u32 val, u32 __iomem *reg)
{
u32 data = readl(reg);
--
2.43.0
