Re: [PATCH v6 10/12] irqchip/renesas-rzv2h: Update TSSR_TIEN macro

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On Mon, 24 Feb 2025 at 14:13, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> On RZ/G3E, TIEN bit position is at 15 compared to 7 on RZ/V2H. Replace the
> macro ICU_TSSR_TIEN(n)->ICU_TSSR_TIEN(n, _field_width) for supporting both
> these SoCs.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v5->v6:
>  * Retained the macro ICU_TSSR_TIEN by adding _field_width parameter.

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds




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