Hi Fabrizio,
On Thu, 20 Feb 2025 at 16:01, Fabrizio Castro
<fabrizio.castro.jz@xxxxxxxxxxx> wrote:
> Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
> The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
> Renesas RZ/G2L family of SoCs, but there are some differences:
> * It only uses one register area
> * It only uses one clock
> * It only uses one reset
> * Instead of using MID/IRD it uses REQ NO/ACK NO
> * It is connected to the Interrupt Control Unit (ICU)
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> v1->v2:
> * Removed RZ/V2H DMAC example.
> * Improved the readability of the `if` statement.
Thanks for the update!
> --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> @@ -61,14 +66,22 @@ properties:
> '#dma-cells':
> const: 1
> description:
> - The cell specifies the encoded MID/RID values of the DMAC port
> - connected to the DMA client and the slave channel configuration
> - parameters.
> + For the RZ/A1H, RZ/Five, RZ/G2{L,LC,UL}, RZ/V2L, and RZ/G3S SoCs, the cell
> + specifies the encoded MID/RID values of the DMAC port connected to the
> + DMA client and the slave channel configuration parameters.
> bits[0:9] - Specifies MID/RID value
> bit[10] - Specifies DMA request high enable (HIEN)
> bit[11] - Specifies DMA request detection type (LVL)
> bits[12:14] - Specifies DMAACK output mode (AM)
> bit[15] - Specifies Transfer Mode (TM)
> + For the RZ/V2H(P) SoC the cell specifies the REQ NO, the ACK NO, and the
> + slave channel configuration parameters.
> + bits[0:9] - Specifies the REQ NO
So REQ_NO is the new name for MID/RID.
> + bits[10:16] - Specifies the ACK NO
This is a new field.
However, it is not clear to me which value to specify here, and if this
is a hardware property at all, and thus needs to be specified in DT?
> + bit[17] - Specifies DMA request high enable (HIEN)
> + bit[18] - Specifies DMA request detection type (LVL)
> + bits[19:21] - Specifies DMAACK output mode (AM)
> + bit[22] - Specifies Transfer Mode (TM)
These are the same as on other RZ SoCs.
So wouldn't it be simpler to move ACK NO to the end (iff you need it
in DT), so the rest of the layout stays the same as on other RZ SoCs?
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
