Re: [PATCH 11/14] serial: sh-sci: Add support for RZ/T2H SCI

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Hi Thierry,

On Wed, 29 Jan 2025 at 17:52, Thierry Bultel
<thierry.bultel.yh@xxxxxxxxxxxxxx> wrote:
> Define a new RZSCI port type, and the RSCI 32 bits registers set.
> The RZ/T2H SCI has a a fifo, and a quite different set of registers
> from the orginal SH SCI ones.
> DMA is not supported yet.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@xxxxxxxxxxxxxx>

Thanks for your patch!

> --- /dev/null
> +++ b/drivers/tty/serial/rzsci.c
> @@ -0,0 +1,484 @@

> +/* RDR (Receive Data Register) */
> +#define RDR_FER                        BIT(28) /* Framing Error */
> +#define RDR_PER                        BIT(27) /* Parity Error */
> +#define RDR_ORER               BIT(24) /* Overrun Error */
> +#define RDR_FFER               BIT(12) /* FIFO Framing Error */
> +#define RDR_FPER               BIT(11) /* FIFO Parity Error */
> +#define RDR_DR                 BIT(10) /* Incoming Data Ready */
> +#define RDR_MPB                        BIT(9)  /* Multiprocessor Bit */

None of the above are used...

> +#define        RDR_RDAT_MSK            GENMASK(8, 0)

...

> +static void rzsci_receive_chars(struct uart_port *port)
> +{
> +       struct tty_port *tport = &port->state->port;
> +       int i, count, copied = 0;
> +       u32 status, frsr_status = 0;
> +       unsigned char flag;
> +
> +       status = rzsci_serial_in(port, CSR);
> +       frsr_status = rzsci_serial_in(port, FRSR);
> +
> +       if (!(status & CSR_RDRF) && !(frsr_status & FRSR_DR))
> +               return;
> +
> +       while (1) {
> +               /* Don't copy more bytes than there is room for in the buffer */
> +               count = tty_buffer_request_room(tport, rzsci_rxfill(port));
> +
> +               /* If for any reason we can't copy more data, we're done! */
> +               if (count == 0)
> +                       break;
> +
> +               for (i = 0; i < count; i++) {
> +                       char c;
> +
> +                       status = rzsci_serial_in(port, CSR);

Isn't the point of the RDR_* status bits in the top part of the RDR
register that you don't need to read the CSR register anymore?

> +                       c = rzsci_serial_in(port, RDR) & RDR_RDAT_MSK;

Note that this drops bit 8.

> +
> +                       if (uart_handle_sysrq_char(port, c)) {
> +                               count--;
> +                               i--;
> +                               continue;
> +                       }
> +
> +                       /* Store data and status */
> +                       if (status & CSR_FER) {
> +                               flag = TTY_FRAME;
> +                               port->icount.frame++;
> +                       } else if (status & CSR_PER) {
> +                               flag = TTY_PARITY;
> +                               port->icount.parity++;
> +                       } else
> +                               flag = TTY_NORMAL;
> +
> +                       tty_insert_flip_char(tport, c, flag);
> +               }
> +
> +               rzsci_serial_in(port, CSR); /* dummy read */
> +               rzsci_clear_DRxC(port);
> +
> +               copied += count;
> +               port->icount.rx += count;
> +       }

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds




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