On Tue, 28 Jan 2025 at 04:14, John Madieu <john.madieu.xa@xxxxxxxxxxxxxx> wrote:
> Add SoC detection support for RZ/G3E SoC. Also add support for detecting
> the number of cores and ETHOS-U55 NPU and also detect PLL mismatch for SW
> settings other than 1.7GHz.
>
> Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> ---
> Changes in v5:
> - Avoided using common include file for register definition for both RZ/G3E and RZ/V2H
> - Do not use macro for register definitions
> - Do not use a variable per line while printing messages
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v6.15.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
