Hi Biju,
Thanks for your patch!
On Tue, 28 Jan 2025 at 11:47, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> The ICU block on the RZ/G3E SoC is almost identical to the one found on
> the RZ/V2H SoC, with the following differences:
> - The TINT register offset starts at 0x830 instead of 0x30.
The first TINT register is at offset 0x820 vs. 0x20.
Perhaps:
- The TINT register base offset is 0x800 instead of zero.
which matches what the actual code does (.t_offs = 0).
> - The number of GPIO interrupts for TINT selection is 141 instead of 86.
> - The pin index and TINT selection index are not in the 1:1 map
> - The number of TSSR registers is 15 instead of 8
16 (oh, also in the first patch)
> - Each TSSR register can program 2 TINTs instead of 4 TINTs
>
> Introduce struct rzv2h_hw_info to handle these differences and add t_offs
> variable to take care of the TINT register offset difference between
> RZ/G3E and RZ/V2H.
>
> Refactor the code by moving rzv2h_icu_init() into rzv2h_icu_init_common()
> and pass the varable containing hw difference to support both these SoCs.
variable
>
> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
The actual code change is fine, so with the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
