Re: [PATCH] clk: renesas: rzg2l-cpg: Refactor Runtime PM clock validation

["Lad, Prabhakar" <prabhakar.csengg@xxxxxxxxx>]

Hi Geert,

On Mon, Dec 16, 2024 at 9:02 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Refactor rzg2l_cpg_attach_dev to delegate clock validation for Runtime PM
> to the updated rzg2l_cpg_is_pm_clk function. Ensure validation of clocks
> associated with the power domain while excluding external and core clocks.
> Prevent incorrect Runtime PM management for clocks outside the domain's
> scope.
>
> Update rzg2l_cpg_is_pm_clk to operate on a per-power-domain basis. Verify
> clkspec.np against the domain's device node, check argument validity, and
> validate clock type (CPG_MOD). Use the no_pm_mod_clks array to exclude
> specific clocks from PM management.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
>  drivers/clk/renesas/rzg2l-cpg.c | 102 +++++++++++++++++---------------
>  1 file changed, 54 insertions(+), 48 deletions(-)
>
Gentle ping.

Cheers,
Prabhakar