Hi Biju, kernel test robot noticed the following build warnings: [auto build test WARNING on 483082d78a092a3c1f343a76a2edb196069b4092] url: https://github.com/intel-lab-lkp/linux/commits/Biju-Das/dt-bindings-pwm-Add-RZ-G2L-GPT-binding/20241217-213809 base: 483082d78a092a3c1f343a76a2edb196069b4092 patch link: https://lore.kernel.org/r/20241217132921.169640-4-biju.das.jz%40bp.renesas.com patch subject: [PATCH v23 3/4] pwm: Add support for RZ/G2L GPT config: sh-allmodconfig (https://download.01.org/0day-ci/archive/20241218/202412182358.9wma1UUE-lkp@xxxxxxxxx/config) compiler: sh4-linux-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241218/202412182358.9wma1UUE-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202412182358.9wma1UUE-lkp@xxxxxxxxx/ All warnings (new ones prefixed by >>): drivers/pwm/pwm-rzg2l-gpt.c: In function 'rzg2l_gpt_probe': >> drivers/pwm/pwm-rzg2l-gpt.c:374:13: warning: unused variable 'i' [-Wunused-variable] 374 | u32 i; | ^ vim +/i +374 drivers/pwm/pwm-rzg2l-gpt.c 364 365 static int rzg2l_gpt_probe(struct platform_device *pdev) 366 { 367 struct rzg2l_gpt_chip *rzg2l_gpt; 368 struct device *dev = &pdev->dev; 369 struct reset_control *rstc; 370 struct pwm_chip *chip; 371 unsigned long rate; 372 struct clk *clk; 373 int ret; > 374 u32 i; 375 376 chip = devm_pwmchip_alloc(dev, RZG2L_MAX_PWM_CHANNELS, sizeof(*rzg2l_gpt)); 377 if (IS_ERR(chip)) 378 return PTR_ERR(chip); 379 rzg2l_gpt = to_rzg2l_gpt_chip(chip); 380 381 rzg2l_gpt->mmio = devm_platform_ioremap_resource(pdev, 0); 382 if (IS_ERR(rzg2l_gpt->mmio)) 383 return PTR_ERR(rzg2l_gpt->mmio); 384 385 rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL); 386 if (IS_ERR(rstc)) 387 return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert reset control\n"); 388 389 clk = devm_clk_get_enabled(dev, NULL); 390 if (IS_ERR(clk)) 391 return dev_err_probe(dev, PTR_ERR(clk), "Cannot get clock\n"); 392 393 ret = devm_clk_rate_exclusive_get(dev, clk); 394 if (ret) 395 return ret; 396 397 rate = clk_get_rate(clk); 398 if (!rate) 399 return dev_err_probe(dev, -EINVAL, "The gpt clk rate is 0"); 400 401 /* 402 * Refuse clk rates > 1 GHz to prevent overflow later for computing 403 * period and duty cycle. 404 */ 405 if (rate > NSEC_PER_SEC) 406 return dev_err_probe(dev, -EINVAL, "The gpt clk rate is > 1GHz"); 407 408 /* 409 * Rate is in MHz and is always integer for peripheral clk 410 * 2^32 * 2^10 (prescalar) * 10^6 (rate_khz) < 2^64 411 * So make sure rate is multiple of 1000. 412 */ 413 rzg2l_gpt->rate_khz = rate / KILO; 414 if (rzg2l_gpt->rate_khz * KILO != rate) 415 return dev_err_probe(dev, -EINVAL, "Rate is not multiple of 1000"); 416 417 mutex_init(&rzg2l_gpt->lock); 418 419 chip->ops = &rzg2l_gpt_ops; 420 ret = devm_pwmchip_add(dev, chip); 421 if (ret) 422 return dev_err_probe(dev, ret, "Failed to add PWM chip\n"); 423 424 return 0; 425 } 426 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
