On Fri, Nov 22, 2024 at 12:45:40PM +0000, Biju Das wrote: > Document the device tree bindings for the Renesas RZ/G3E SoC > Clock Pulse Generator (CPG). > > Also define constants for the core clocks of the RZ/G3E SoC. > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
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