Hi Biju,
Thank you for the patch.
On Tue, Nov 05, 2024 at 11:12:19AM +0000, Biju Das wrote:
> Fix out-of-bounds array in adv7511_dsi_config_timing_gen(),
> when dsi lanes = 1.
Does the hardware support using the internal timing generator with a
single lane ? If so adv7511_dsi_config_timing_gen() should be fixed,
otherwise that should be explained in the commit message, and mentioned
with a comment in adv7533_parse_dt(). I would also print an error
message in that case.
If the internal timing generator can't be used with a single lane, the
DT bindings should also be updated to document that.
> Fixes: 78fa479d703c ("drm/bridge: adv7533: Use internal timing generator")
> Reported-by: Hien Huynh <hien.huynh.px@xxxxxxxxxxx>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> Changes in v2:
> - Added the tag "Cc: stable@xxxxxxxxxxxxxxx" in the sign-off area.
> - Dropped Archit Taneja invalid Mail address
> ---
> drivers/gpu/drm/bridge/adv7511/adv7533.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c
> index 3e57ba838e5e..0c2236e53af5 100644
> --- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
> +++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
> @@ -185,6 +185,9 @@ int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
> adv->use_timing_gen = !of_property_read_bool(np,
> "adi,disable-timing-generator");
>
> + if (adv->use_timing_gen && num_lanes == 1)
> + return -EINVAL;
> +
> /* TODO: Check if these need to be parsed by DT or not */
> adv->rgb = true;
> adv->embedded_sync = false;
--
Regards,
Laurent Pinchart
