Re: [PATCH 2/2] clk: renesas: r9a09g057-cpg: Add support for PLLVDO, CRU clocks, and resets

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

s/r9a09g057-cpg/r9a09g057/

On Mon, Oct 28, 2024 at 10:29 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add support for the PLLVDO clock and its related CRU clocks and reset
> entries in the r9a09g057 CPG driver. Introduce `CLK_PLLVDO` and associated
> clocks like `CLK_PLLVDO_CRU0`, `CLK_PLLVDO_CRU1`, `CLK_PLLVDO_CRU2`, and
> `CLK_PLLVDO_CRU3`, along with their corresponding dividers.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds