Hi Geert,
Thanks for the feedback.
> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: Thursday, October 24, 2024 11:12 AM
> To: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>; Stephen Boyd <sboyd@xxxxxxxxxx>; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; Prabhakar
> Mahadev Lad <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>; biju.das.au <biju.das.au@xxxxxxxxx>; Hien Huynh
> <hien.huynh.px@xxxxxxxxxxx>
> Subject: Re: [PATCH v3] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk
>
> Hi Biju,
>
> On Wed, Oct 16, 2024 at 12:15 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > While computing foutpostdiv_rate, the value of params->pl5_fracin is
> > discarded, which results in the wrong refresh rate. Fix the formula
> > for computing foutpostdiv_rate.
> >
> > Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk
> > support")
> > Signed-off-by: Hien Huynh <hien.huynh.px@xxxxxxxxxxx>
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > ---
> > v2->v3:
> > * Used mul_u32_u32() for 32-bit multiplication.
>
> Thanks for the update!
>
> > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > @@ -557,10 +557,10 @@ rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params,
> > params->pl5_postdiv2 = 1;
> > params->pl5_spread = 0x16;
> >
> > - foutpostdiv_rate =
> > - EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv *
> > - ((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) /
> > - (params->pl5_postdiv1 * params->pl5_postdiv2);
> > + foutvco_rate = mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA, (params->pl5_intin << 24) +
> > + params->pl5_fracin) /
> > + params->pl5_refdiv >> 24;
>
> The division is a 64-by-32 division, so it should use the div_u64() helper.
You mean,
foutvco_rate = div_u64(mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA, (params->pl5_intin << 24) +
params->pl5_fracin) , params->pl5_refdiv) >> 24; ??
Cheers,
Biju
