Add support for the mini-DisplayPort connector on the White Hawk BreakOut board. This port is driven by a TI SN65DSI86 DSI to eDP bridge, which in turn gets the pixel data from the second DSI channel on the R-Car V4H SoC. Note that this port is not present on the White Hawk Single development board. Based on the work by Tomi Valkeinen for the mini-DP port on the White Hawk CPU board, and by a patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> --- This has a hard dependency on "[PATCH] drm/bridge: ti-sn65dsi86: Fix multiple instances"[1], as the rcar-du driver fails to probe when any of the encoders failed to initialize: platform feb00000.display: deferred probe pending: rcar-du: failed to initialize encoders Does not work: - Display resolution is detected correctly (1920x1080 or 2560x1440), - Black screen, displays say no signal detected, - "modetest -M rcar-du -s 88:1920x1080@XR24" triggers: rcar-mipi-dsi fed90000.dsi-encoder: Failed to disable video transmission vsp1 fea20000.vsp: Underrun occurred at WPF0 (total underruns 2) Note that fea20000.vsp is vspd0, not vspd1. I do have a few similar messages for fea28000.vsp in my logs, so this may be a red herring. [1] https://lore.kernel.org/8c2df6a903f87d4932586b25f1d3bd548fe8e6d1.1729180470.git.geert+renesas@xxxxxxxxx/ --- .../boot/dts/renesas/r8a779g0-white-hawk.dts | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts index 784d4e8b204ce85a..cb84fe5e9eea1f2f 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts @@ -12,4 +12,94 @@ / { model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0"; compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0"; + + sn65dsi86_refclk2: clk-x16 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; + + mini-dp-con2 { + compatible = "dp-connector"; + label = "CN15"; + type = "mini"; + + port { + mini_dp_con_in2: endpoint { + remote-endpoint = <&sn65dsi86_out2>; + }; + }; + }; +}; + +&dsi1 { + status = "okay"; + + ports { + port@1 { + dsi1_out: endpoint { + remote-endpoint = <&sn65dsi86_in2>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&i2c4 { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + bridge@2c { + pinctrl-0 = <&irq1_pins>; + pinctrl-names = "default"; + + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk2>; + clock-names = "refclk"; + + interrupts-extended = <&intc_ex 1 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in2: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out2: endpoint { + remote-endpoint = <&mini_dp_con_in2>; + }; + }; + }; + }; +}; + +&pfc { + i2c4_pins: i2c4 { + groups = "i2c4"; + function = "i2c4"; + }; + + irq1_pins: irq1 { + groups = "intc_ex_irq1_a"; + function = "intc_ex"; + }; }; -- 2.34.1