On Tue, Sep 03, 2024 at 07:18:53PM +0200, Niklas Söderlund wrote:
> Add C45 specific read and write implementations to support C45 PHY
> access using SIOCGMIIREG and SIOCSMIIREG IOCTLs.
>
> While the core can handle a C45 PHY using only the MDIO bus C22 read()
> and write() callbacks there are PHY interactions that are not possible
> without them. One use-case is accessing PHY registers using the
> SIOCGMIIREG and SIOCSMIIREG IOCTLs. Without these callbacks trying to
> access C45 PHY registers using these IOCTLs result in -EOPNOTSUPP.
This is the wrong solution. You should not be reproducing
functionality which phylib already has.
Please extend the IOCTL code to do what the core does:
int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
{
if (regnum > (u16)~0 || devad > 32)
return -EINVAL;
if (phydev->drv && phydev->drv->read_mmd)
return phydev->drv->read_mmd(phydev, devad, regnum);
return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
phydev->is_c45, devad, regnum);
}
mmd_phy_read() will fall back to indirect access if need be.
Just watch out for mii_data->phy_id and what it implies.
Andrew
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pw-bot: cr
