Hi Mike, Stephen,
The following changes since commit 120c2833b72f4bdbd67ea2cf70b9d96d1c235717:
clk: renesas: r8a779h0: Add CANFD clock (2024-08-20 09:48:24 +0200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.12-tag2
for you to fetch changes up to 3aeccbe08171b79f82fb802393a6324c7b732669:
clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT (2024-09-02 10:15:38 +0200)
----------------------------------------------------------------
clk: renesas: Updates for v6.12 (take two)
- Add USB clocks, resets and power domains on RZ/G3S,
- Add Generic Timer (GTM), I2C Bus Interface (RIIC), SD/MMC Host
Interface (SDHI) and Watchdog Timer (WDT) clocks and resets on
RZ/V2H,
- Miscellaneous fixes and improvements.
Thanks for pulling!
----------------------------------------------------------------
Claudiu Beznea (1):
clk: renesas: r9a08g045: Add clocks, resets and power domains for USB
Krzysztof Kozlowski (1):
dt-bindings: clock: renesas,cpg-clocks: Add top-level constraints
Lad Prabhakar (2):
clk: renesas: rzv2h: Add support for dynamic switching divider clocks
clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT
.../bindings/clock/renesas,cpg-clocks.yaml | 8 +-
drivers/clk/renesas/r9a08g045-cpg.c | 17 +++
drivers/clk/renesas/r9a09g057-cpg.c | 84 +++++++++++
drivers/clk/renesas/rzv2h-cpg.c | 165 ++++++++++++++++++++-
drivers/clk/renesas/rzv2h-cpg.h | 43 +++++-
5 files changed, 312 insertions(+), 5 deletions(-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
